CPUs, GPUs, NPUs, and the Three Eras of Labor: What Have Machines Taken From Us, and What Will They Take Next?

Updated: August 2026.

On the same circuit board, there are three chips that all run on electricity, are all made of silicon, and all use binary code—but they operate according to three entirely different philosophies. Interestingly, those three philosophies almost perfectly align with the three ways humanity has organized labor over the past two hundred years. By understanding why a chip is designed this way, we also understand why a profession disappears—and which ones will disappear next.

CPU: The All-Purpose Master Craftsman

The CPU is designed with one assumption in mind: it doesn’t know what comes next. Programs are full of “if” statements, function calls, and loops whose number of iterations depends on the data. So the CPU devotes nearly all of its chip area to making smart guesses and waiting:

• Branch prediction: predict in advance which path the “if” statement will take, and prepare for it; if the prediction is wrong, cancel and try again.
• Out-of-order execution: Execute commands as soon as they have enough data; do not follow a rigid sequence.
• Multi-level caching: Keep frequently used data close at hand, since retrieving it from RAM takes a hundred times longer.

The result: a single CPU core can handle any kind of task, even complex and unpredictable ones. The trade-off is that every useful calculation must also support the entire prediction and waiting mechanism—which takes up space and consumes power. This is exactly like a master craftsman: he can do any job you give him, but he’s expensive to hire.

GPU: A Construction Site with Tens of Thousands of People, All Moving in Unison

GPUs start from the opposite assumption: there are millions of identical tasks that differ only in their data—filling in a million pixels, multiplying two massive matrices. When the tasks are this uniform, there’s no need to guess; what’s needed is more processing power.

• Thousands of small, simple cores all execute the same instruction on large amounts of data.
• Compensating for latency with scale: if one group has to wait for data, it immediately switches to another group—there’s always work to be done.
• Memory bandwidth is the lifeblood: data must be fed fast enough to keep all those workers busy.

The weakness becomes apparent as soon as the workload becomes uneven: if some members of a group go left and others go right, the GPU has to process both paths one after the other and discard some of the results—wasting half the effort. This is like an assembly line: productivity is tremendous, as long as everyone does exactly the same thing.

NPU: a production line dedicated to a single specialty

NPUs (and their counterparts, such as TPUs) take it a step further: they recognize that nearly all of a neural network’s work boils down to multiplication followed by accumulation. So why not ditch the general-purpose part and build a machine dedicated solely to that task:

• Flow-based computation: Data flows through a grid of cells; each cell performs multiplication and addition, then passes the result to the next cell. Instead of retrieving data from memory at each step, the data is passed from cell to cell.
• Fewer bits: Use 8-bit or 4-bit numbers instead of 32-bit—the neural network can tolerate errors, and each bit saved reduces power consumption and chip area.
• Predefined schedule: The compiler maps out the data path in advance, so the hardware doesn’t have to make any guesses.

The trade-off is rigidity. When the architecture of a model shifts its computational style—such as when the AI community moves toward sparse attention mechanisms or sparse models—chips that were originally optimized for dense multiplication may suddenly have excess capacity. The more specialized something is, the more efficient it becomes—and the more prone it is to becoming obsolete. This isn’t unique to silicon: it’s the law of all forms of specialization.

Reexamine labor history in light of that very principle

Humankind has delegated tasks to machines four times, and each time it has followed the same pattern: machines take on the measurable and repeatable tasks, while humans step back to handle the more difficult-to-evaluate ones.

First—muscle. Steam engines and then electric motors replaced pulling and lifting power. What was replaced was not “humans” but a physical quantity: horsepower. Because it is measurable, it can be replaced.

Step Two — Repetitive Operations. Assembly lines and machine tools take over assembly tasks. The prerequisite for this transition is standardization: breaking the work down into identical steps. Standardization paves the way for automation—it always does.

Round Three — Calculations and Paperwork. CPUs replaced manual bookkeepers, typists, and switchboard operators. This was the first time machines encroached on “intellectual labor,” and people realized an unsettling truth: most of what we call “intellectual labor” is actually a process—and processes can be written as code.

Step Four — Pattern Recognition and Language. This is where the GPU and NPU take center stage. What’s being automated this time is something that no one could previously codify into rules: recognizing faces, translating a sentence, summarizing a document, and writing simple code. It’s not because we’ve figured out the rules, but because we’ve changed our approach: instead of writing rules, we provide a mountain of examples and let the machine discover statistical patterns on its own—and that process boils down to matrix multiplication, exactly what GPUs and NPUs were built to do.

The real boundary does not lie between the body and the mind

The distinction between “manual labor” and “mental labor” sounds reasonable but is no longer useful. There are manual tasks that machines still can’t handle—an electrician running wires through the ceiling of an old house, a nurse catching a patient who’s falling, a chef seasoning a pot of broth based on today’s batch of bones. And there are purely mental tasks that machines have long been better at than humans—calculating interest, checking for spelling errors, and looking up case law.

The real dividing line lies elsewhere: whether or not it’s possible to score automatically. Wherever there is a clear metric to say “this result is better than that one,” and it can be scored millions of times at low cost, machines will advance very quickly—because they improve by trying and being scored billions of times. Conversely, in tasks where defining what is “correct” is the hardest part, machines make very slow progress.

That’s why AI code development is advancing at an incredible pace: the code has a compiler and a suite of tests acting as referees, with automatic scoring. But when it comes to deciding what to build, there’s no referee—that falls under the realm of verification and accountability, which humans still have to shoulder.

Economic Corner: What’s in Short Supply Has Shifted

In every era, there is a scarce resource that determines the value of everything else. In the age of muscle, it was strength; in the age of assembly lines, it was machinery; in the age of the CPU, it was people who knew how to write programs. Now, that scarce resource is shifting through three stages:

• From transistors to memory and bandwidth. Multiplication is cheap; feeding data into it is what’s expensive. This is the root of the memory chip crisis and of every power-saving trick in the inference engine.
• From memory to power. The true limit of a modern data center is megawatts and heat, not the number of transistors. When power is the limit, every chip is judged by its useful work per watt—and that’s why the NPU exists.
• From power to knowing what to compute. When anyone can buy computing power, the remaining advantage lies in knowing how to frame the right problem, having data others don’t, and being willing to take responsibility for the results.

What will happen next?

The direction of hardware development is to continue along the path of specialization, and each step involves trade-offs, just as the old rule dictates:

• Compute directly in memory. Instead of moving data to where the computation takes place, place the computation right next to—or even within—the memory array. This saves on the most power-intensive part of the process: data movement.
• Optical. Use light to transmit and combine signals: very fast and very cool for linear operations, but the back-and-forth conversion between electrical and optical signals is costly.
• Neuromorphic. Chips that mimic how neurons fire—consuming power only when an event occurs. Well-suited for always-on sensors, but not yet suitable for large models.
• 3D packaging and wafer scale. When further scaling is no longer possible, stack the layers and connect them via the shortest possible paths.
• Quantum computing lies outside this axis: it is not an upgrade to conventional chips but a tool for an entirely different class of problems.

It’s worth noting that the opposite trend is also gaining momentum: as the industry shifts to a development cycle shorter than three years for chip production, flexibility is once again in demand—hybrid chips that combine specialized and general-purpose capabilities, or reprogrammable architectures. Specialization is not a one-way street; it’s a pendulum.

What Will the Future Look Like?

If the 200-year rule still holds true, this is the most likely scenario—not “machines replacing humans,” but a shifting boundary:

• The split labor market. Each job is divided into a quantifiable component (handled by machines) and a judgmental component (handled by people). Those who perform only the first part will face the heaviest pressure—like hand weavers in the era of mechanical looms, or typists in the era of personal computers.
• Value is concentrated at both ends. One end involves setting the problem, taking responsibility, and maintaining trust. The other end involves hands-on work in the chaotic physical world—where robots are still clumsy. The middle ground of “following established procedures” is being eroded.
• Standardization remains a harbinger. To determine which professions are next in line for automation, look at how standardized they already are, and whether anyone has yet developed automated metrics for them. Standardization always precedes machinery.
• Energy becomes a social constraint. When artificial intelligence is measured in megawatts, questions about electricity, cooling water, and land turn data centers into matters of local politics—no longer just technical issues.

Prediction

• Hybrid chips will prevail over pure-play chips. The mainstream product will be a package combining a CPU, GPU, NPU, and high-bandwidth memory on a single die, rather than three separate chips—the “single-die” architecture is spreading from personal computers to servers.
• Efficiency per watt will become the primary metric for both hardware and models, replacing peak performance figures that are becoming increasingly meaningless.
• Flexibility makes a comeback. After several years of extreme specialization, there will be a reversal: reprogrammable architectures will rise to prominence because models change faster than chip lifecycles.
• New professions currently lack names. Just as “process engineers” or “data analysts” once didn’t exist, the jobs of the future will revolve around defining metrics: who decides what constitutes the right outcome, and who takes responsibility when those metrics are wrong.
• What machines struggle with most is still what cannot be measured: choosing worthwhile goals, bearing the consequences, and earning the trust of others. It’s not because machines are weak, but because there’s no one to judge us except ourselves.

The three chips on the circuit board are not just three different arrangements of transistors. They are three answers to the same question that humankind has been asking since the days of the steam engine: Which tasks should we outsource, and which should we keep for ourselves? The answers change with each generation—but the way the question is asked does not.